Invention Grant
- Patent Title: Transistor source/drain regions and methods of forming the same
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Application No.: US17530026Application Date: 2021-11-18
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Publication No.: US12080759B2Publication Date: 2024-09-03
- Inventor: Yan-Ting Lin , Wei-Jen Lai , Chien-I Kuo , Wei-Yuan Lu , Chia-Pin Lin , Yee-Chia Yeo
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L21/8234 ; H01L29/06 ; H01L29/423 ; H01L29/66 ; H01L29/786

Abstract:
In an embodiment, a device includes: a nanostructure; and a source/drain region adjoining a channel region of the nanostructure, the source/drain region including: a first epitaxial layer on a sidewall of the nanostructure, the first epitaxial layer including a germanium-free semiconductor material and a p-type dopant; a second epitaxial layer on the first epitaxial layer, the second epitaxial layer including a germanium-containing semiconductor material and the p-type dopant; and a third epitaxial layer on the second epitaxial layer, the third epitaxial layer including the germanium-containing semiconductor material and the p-type dopant.
Public/Granted literature
- US20220367622A1 Transistor Source/Drain Regions and Methods of Forming the Same Public/Granted day:2022-11-17
Information query
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