- 专利标题： Self-aligned front-end charge trap flash memory cell and capacitor design for integrated high-density scaled devices
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申请号： US16910020申请日： 2020-06-23
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公开(公告)号： US12089411B2公开(公告)日： 2024-09-10
- 发明人: Tanuj Trivedi , Walid M. Hafez , Rohan Bambery , Daniel B. O'Brien , Christopher Alan Nolph , Rahul Ramaswamy , Ting Chang
- 申请人： Intel Corporation
- 申请人地址： US CA Santa Clara
- 专利权人： Intel Corporation
- 当前专利权人： Intel Corporation
- 当前专利权人地址： US CA Santa Clara
- 代理机构： Schwabe, Williamson & Wyatt P.C.
- 主分类号： H01L29/78
- IPC分类号： H01L29/78 ; H01L21/28 ; H01L29/66 ; H01L29/792 ; H01L49/02 ; H10B43/30
摘要：
Embodiments disclosed herein include a semiconductor device and methods of forming such a device. In an embodiment, the semiconductor device comprises a substrate and a transistor on the substrate. In an embodiment, the transistor comprises a first gate electrode, where the first gate electrode is part of a first array of gate electrodes with a first pitch. In an embodiment, the first gate electrode has a first average grain size. In an embodiment, the semiconductor device further comprises a component cell on the substrate. In an embodiment, the component cell comprises a second gate electrode, where the second gate electrode is part of a second array of gate electrodes with a second pitch that is larger than the first pitch. In an embodiment, the second gate electrode has a second average grain size that is larger than the first average grain size.
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