Scan circuit and display apparatus
Abstract:
A scan circuit is provided, including first, second and third control signal driving circuits; wherein, in a first region, the first control signal driving circuit includes L stages, L being an integer ≥1; in a second region, the second control signal driving circuit includes M1 stages and the third control signal driving circuit includes M2 stages, M1, M2 each being an integer ≥1; in a third region, the first control signal driving circuit includes N1 stages, the second control signal driving circuit includes N2 stages, and the third control signal driving circuit includes N3 stages, N1, N2, N3 each being an integer ≥2; and the first region, the second region, and the third region surround a first portion, a second portion, and a third portion of a perimeter of a display region, respectively, the first portion, the second portion, and the third portion being at least partially non-overlapping.
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