- 专利标题: Techniques for void-free material depositions
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申请号: US18224904申请日: 2023-07-21
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公开(公告)号: US12131948B2公开(公告)日: 2024-10-29
- 发明人: M. Arif Zeeshan , Kelvin Chan , Shantanu Kallakuri , Sony Varghese , John Hautala
- 申请人: Applied Materials, Inc.
- 申请人地址: US CA Santa Clara
- 专利权人: Applied Materials, Inc.
- 当前专利权人: Applied Materials, Inc.
- 当前专利权人地址: US CA Santa Clara
- 代理机构: KDW FIRM PLLC
- 主分类号: H01L21/768
- IPC分类号: H01L21/768 ; H01L21/48
摘要:
Embodiments herein include void-free material depositions on a substrate (e.g., in a void-free trench-filled (VFTF) component) obtained using directional etching to remove predetermined portions of a seed layer covering the substrate. In several embodiments, directional etching followed by selective deposition can enable fill material (e.g., metal) patterning in tight spaces without any voids or seams. Void-free material depositions may be used in a variety of semiconductor devices, such as transistors, dual work function stacks, dynamic random-access memory (DRAM), non-volatile memory, and the like.
公开/授权文献
- US20230369112A1 TECHNIQUES FOR VOID-FREE MATERIAL DEPOSITIONS 公开/授权日:2023-11-16
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