A scan circuit is provided. The scan circuit includes a plurality of stages. A respective stage of the scan circuit includes a second processing subcircuit, which includes a first capacitor, a sixth transistor, and a seventh transistor. The respective stage of the scan circuit further includes a sixth connecting line connecting a first electrode of the seventh transistor, a second electrode of the sixth transistor, and a second capacitor electrode of the first capacitor together. The sixth connecting line crosses over both the first capacitor electrode and the second capacitor electrode of the first capacitor.