This document describes apparatuses and techniques for termination of a pulse amplitude modulation signal of a memory circuit. In various aspects, a memory circuit is implemented with a termination circuit that includes a power rail, a resistor, and a switch to couple the resistor between the power rail and a signal line of a memory interconnect. The power rail may be configured to provide power at a termination voltage that is nominally half of a voltage of another power rail from which a corresponding transmission circuit operates. This may be effective to enable termination of pulse amplitude modulation signals to the termination voltage instead of a higher voltage that corresponds to the power rail of the transmission circuit or a ground-referenced node. By so doing, use of the termination circuit may reduce power consumption and/or improve signal integrity of the memory circuit.