Invention Grant
- Patent Title: Embedded die on interposer packages
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Application No.: US18368929Application Date: 2023-09-15
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Publication No.: US12230582B2Publication Date: 2025-02-18
- Inventor: John S. Guzek
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt, P.C.
- Main IPC: H01L23/538
- IPC: H01L23/538 ; H01L21/56 ; H01L23/13 ; H01L23/31 ; H01L23/48 ; H01L23/498 ; H01L25/065 ; H01L25/07

Abstract:
Integrated circuit (IC) packages having a through-via interposer with an embedded die, as well as related structures, devices, and methods, are disclosed herein. For example, in some embodiments, an IC package may include a through-via interposer with an embedded die, the through-via connections having front to back conductivity. In some embodiments, a die may be disposed on the back side of an IC package having a through-via interposer with an embedded die and may be electrically coupled to the embedded die. In some embodiments, a second IC package in a package-on-package (PoP) arrangement may be disposed on the back side of an IC package having a through-via interposer with an embedded die and may be electrically coupled to the conductive vias.
Public/Granted literature
- US20240006331A1 EMBEDDED DIE ON INTERPOSER PACKAGES Public/Granted day:2024-01-04
Information query
IPC分类: