An array substrate, a method for manufacturing an array substrate, and a display panel are provided. The array substrate includes a substrate and a thin film transistor layer arranged on the substrate. The thin film transistor layer includes a plurality of thin film transistors. The thin film transistors each include an active layer, a source/drain, a first gate, a second gate, and a first insulating layer. The first gate and the second gate are electrically connected through the through hole. The problems of difficulty in etching and excessively long etching time are avoided while reducing the gate resistance of the thin film transistor.