Invention Application
- Patent Title: Low on-resistance LDMOS
- Patent Title (中): 低导通电阻LDMOS
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Application No.: US09862750Application Date: 2001-05-22
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Publication No.: US20010048133A1Publication Date: 2001-12-06
- Inventor: Giuseppe Croce , Alessandro Moscatelli , Alessandra Merlini , Paola Galbiati
- Applicant: STMicroelectronics S.r.l.
- Applicant Address: IT Agrate Brianza
- Assignee: STMicroelectronics S.r.l.
- Current Assignee: STMicroelectronics S.r.l.
- Current Assignee Address: IT Agrate Brianza
- Priority: EP00830373.7 20000523
- Main IPC: H01L029/76
- IPC: H01L029/76 ; H01L029/94

Abstract:
An LDMOS structure is formed in a region of a first type of conductivity of a semiconductor substrate and comprises a gate, a drain region and a source region. The source region is formed by a body diffusion of a second type of conductivity within the first region, and a source diffusion of the first type of conductivity is within the body diffusion. An electrical connection diffusion of the second type of conductivity is a limited area of the source region, and extends through the source diffusion and reaches down to the body diffusion. At least one source contact is on the source diffusion and the electrical connection diffusion. The LDMOS structure further comprises a layer of silicide over the whole area of the source region short-circuiting the source diffusion and the electrical connection diffusion. The source contact is formed on the silicide layer.
Public/Granted literature
- US06538281B2 Low on-resistance LDMOS Public/Granted day:2003-03-25
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