Invention Application
US20020003286A1 Vertical bipolar transistor including an extrinsic base with reduced roughness, and fabrication process
有权
包括具有减小的粗糙度的外在基极的垂直双极晶体管和制造工艺
- Patent Title: Vertical bipolar transistor including an extrinsic base with reduced roughness, and fabrication process
- Patent Title (中): 包括具有减小的粗糙度的外在基极的垂直双极晶体管和制造工艺
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Application No.: US09930084Application Date: 2001-08-15
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Publication No.: US20020003286A1Publication Date: 2002-01-10
- Inventor: Michel Marty , Alain Chantre , Jorge Regolini
- Applicant: STMICROELECTRONICS S.A.
- Applicant Address: null
- Assignee: STMICROELECTRONICS S.A.
- Current Assignee: STMICROELECTRONICS S.A.
- Current Assignee Address: null
- Priority: FR9807061 19980605
- Main IPC: H01L029/70
- IPC: H01L029/70
Abstract:
The vertical bipolar transistor includes an SiGe heterojunction base formed by a stack of layers of silicon and silicon-germanium resting on an initial layer of silicon nitride extending over a side insulation region surrounding the upper part of the intrinsic collector. The stack of layers also extends on the surface of the intrinsic collector which lies inside a window formed in the initial layer of silicon nitride.
Public/Granted literature
- US06723610B2 Vertical bipolar transistor including an extrinsic base with reduced roughness, and fabrication process Public/Granted day:2004-04-20
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