Invention Application
- Patent Title: Reduced propagation delay current mode cascaded analog-to-digital converter and threshold bit cell therefor
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Application No.: US09901327Application Date: 2001-07-09
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Publication No.: US20020036583A1Publication Date: 2002-03-28
- Inventor: Leonel Ernesto Enriquez
- Applicant: INTERSIL AMERICAS INC.
- Applicant Address: US FL Palm Bay
- Assignee: INTERSIL AMERICAS INC.
- Current Assignee: INTERSIL AMERICAS INC.
- Current Assignee Address: US FL Palm Bay
- Main IPC: H03M001/34
- IPC: H03M001/34

Abstract:
A non-sampling cascaded current mode analog-to-digital converter is formed of cascaded threshold detector bit cells driven by a transconductance amplifier for substantially instantaneously propagated current mode operation. A front end stage receives an input voltage representative of the quantity to be digitized, and outputs a pair of currents to Nnull1 cascaded, identically configured threshold comparator-based bit cells, N being the number of bits of resolution of the converter. A bit cell resolves a digital bit and couples a pair of output currents to the next bit cell. The Nnull1th bit cell in the cascaded architecture is configured to provide both the next to least significant bit and the least significant bit.
Public/Granted literature
- US06492930B2 Reduced propagation delay current mode cascaded analog-to-digital converter and threshold bit cell therefor Public/Granted day:2002-12-10
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