Invention Application
US20020044145A1 Flat display panel having internal lower supply circuit for reducing power consumption
失效
平面显示面板具有内部较低电源电路，可降低功耗
- Patent Title: Flat display panel having internal lower supply circuit for reducing power consumption
- Patent Title (中): 平面显示面板具有内部较低电源电路，可降低功耗
-
Application No.: US09974806Application Date: 2001-10-12
-
Publication No.: US20020044145A1Publication Date: 2002-04-18
- Inventor: Shigetoshi Tomio , Naoki Matsui , Shinpei Yao
- Applicant: Fujitsu Limited of Kawasaki
- Applicant Address: null
- Assignee: Fujitsu Limited of Kawasaki
- Current Assignee: Fujitsu Limited of Kawasaki
- Current Assignee Address: null
- Priority: JP5-290868 19931119
- Main IPC: G09G005/00
- IPC: G09G005/00
Abstract:
A flat display employs at least one high voltage different from logic voltages. The display has a voltage detection unit and a drive control signal control unit. The voltage detection unit is used to detect the high voltage. The drive control signal control unit is used to control drive control signals of the flat display in accordance with the detected high voltage. This arrangement eliminates charging currents that are applied to a display panel but have nothing to do on the actual displaying of data, or reactive currents due to unnecessary switching operations, thereby reducing power consumption.
Public/Granted literature
- US07068264B2 Flat display panel having internal power supply circuit for reducing power consumption Public/Granted day:2006-06-27
Information query
