Invention Application
US20020145909A1 Device and method for timing the reading a nonvolatile memory with reduced switching noise
有权
用于定时读取具有降低的开关噪声的非易失性存储器的装置和方法
- Patent Title: Device and method for timing the reading a nonvolatile memory with reduced switching noise
- Patent Title (中): 用于定时读取具有降低的开关噪声的非易失性存储器的装置和方法
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Application No.: US10077687Application Date: 2002-02-15
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Publication No.: US20020145909A1Publication Date: 2002-10-10
- Inventor: Alessandro Francesco Maone , Maurizio Francesco Perroni
- Applicant: STMicroelectronics S.r.I.
- Applicant Address: IT Agrate Brianza
- Assignee: STMicroelectronics S.r.I.
- Current Assignee: STMicroelectronics S.r.I.
- Current Assignee Address: IT Agrate Brianza
- Priority: ITTO2001A00148 20010220
- Main IPC: G11C011/34
- IPC: G11C011/34
Abstract:
The reading timing device has a data-sensing stage, receiving a sensing-latch signal, and an output stage, including an output buffer and enabled at a first switching edge of a synchronization signal. A reading timing stage generates the sensing-latch signal not before a preset time interval from the first switching edge of the synchronization signal. Thereby, reading, in particular data-latching in the data-sensing stage, is temporarily separated from switching of the output buffers. This separation is obtained using the sync signal. Since the output buffers must switch in a preset time from the rising edge of the sync signal, the pulse of the sensing-latch signal is shifted after this time, and more precisely after the falling edge of the sync signal.
Public/Granted literature
- US06674666B2 Device and method for timing the reading of a nonvolatile memory with reduced switching noise Public/Granted day:2004-01-06
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