Invention Application
US20030137009A1 Protection structure against electrostatic discharges (ESD) for an electronic device integrated on a SOI substrate, and corresponding integration process
有权
用于集成在SOI衬底上的电子器件的静电放电（ESD）的保护结构以及相应的集成过程
- Patent Title: Protection structure against electrostatic discharges (ESD) for an electronic device integrated on a SOI substrate, and corresponding integration process
- Patent Title (中): 用于集成在SOI衬底上的电子器件的静电放电（ESD）的保护结构以及相应的集成过程
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Application No.: US10268054Application Date: 2002-10-08
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Publication No.: US20030137009A1Publication Date: 2003-07-24
- Inventor: Salvatore Leonardi
- Applicant: STMICROELECTRONICS S.R.L.
- Applicant Address: IT Agrate Brianza
- Assignee: STMICROELECTRONICS S.R.L.
- Current Assignee: STMICROELECTRONICS S.R.L.
- Current Assignee Address: IT Agrate Brianza
- Priority: EP01830639.9 20011009
- Main IPC: H01L023/62
- IPC: H01L023/62 ; H01L021/8238
Abstract:
A protection structure against electrostatic discharges for a semiconductor electronic devicethat is integrated inside a well is disclosed, wherein the well is formed on a SOI substrateand isolated dielectrically by a buried oxide layer and an isolation structure, which isolation structure includes in turn at least a dielectric trench filled with a filler material. Advantageously, the protection structure is formed at the isolation structure.
Public/Granted literature
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