Invention Application
US20040033757A1 Methods and systems for planarizing microelectronic devices with Ge-Se-Ag layers
有权
用Ge-Se-Ag层平面化微电子器件的方法和系统
- Patent Title: Methods and systems for planarizing microelectronic devices with Ge-Se-Ag layers
- Patent Title (中): 用Ge-Se-Ag层平面化微电子器件的方法和系统
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Application No.: US10222238Application Date: 2002-08-16
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Publication No.: US20040033757A1Publication Date: 2004-02-19
- Inventor: Nagasubramaniyan Chandrasekaran , Theodore M. Taylor
- Main IPC: B24B049/00
- IPC: B24B049/00 ; B24B051/00 ; B24B001/00

Abstract:
Microelectronic devices including a layer of germanium and selenium, optionally including up to 10 atomic percent silver, show promise for select applications. Manufacturing microelectronic devices containing such layers using conventional CMP processes presents some significant challenges. Embodiments of the invention provide methods of planarizing workpieces with GenullSe layers, many of which can be carried out using conventional CMP equipment. Other embodiments of the invention provide chemical-mechanical polishing systems adapted to produce planarized workpieces with GenullSe layers or, in at least one embodiment, other alternative layers. Various approaches suggested herein facilitate production of such microelectronic devices by appropriate control of the down force of the GenullSe layer against the planarizing medium and/or one or more aspects of the planarizing medium, which aspects include pH, abrasive particle size, abrasive particle hardness, weight percent of abrasive.
Public/Granted literature
- US06884144B2 Methods and systems for planarizing microelectronic devices with Ge-Se-Ag layers Public/Granted day:2005-04-26
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