In accordance with an embodiment of the present invention, a semiconductor memory includes a memory array having a plurality of rows and columns of sectors, a horizontal global row decoder, a vertical global row decoder, and a plurality of horizontal local row decoders. Each of the sectors has a plurality of rows and columns of memory cells. The horizontal global row decoder is configured to select one of the rows of sectors in response to a first set of row address signals. The vertical global row decoder is configured to select one or two adjacent columns of the columns of sectors in response to a second set of row address signals. The plurality of horizontal local row decoders are coupled to the vertical global row decoder and the horizontal global row decoder to select one or two adjacent sectors located at the intersection of the selected row of sectors and the selected one or two adjacent columns of sectors.