A method for memory device block movement. The method comprises the steps of decoding a block movement command carrying a start address, destination address and move length to generate a block movement signal, generating a first, second and third loading signal when the block movement signal is asserted, receiving the start address, destination address and move length when the loading signals are asserted respectively, during a read cycle, outputting the start address to the memory device to transfer data of a buffer length at a location beginning from the start address in the memory device into a buffer, during a write cycle, transferring the data from the buffer to a location beginning from the destination address in the memory device, subtracting the move length by the buffer length, and adding the buffer length to the start and destination address.