发明申请
US20050006767A1 Multi-purpose planarizing/back-grind/pre-underfill arrangements for bumped wafers and dies
失效
用于凸起的晶片和模具的多用途平面化/后研磨/预底部填充布置
- 专利标题： Multi-purpose planarizing/back-grind/pre-underfill arrangements for bumped wafers and dies
- 专利标题（中）： 用于凸起的晶片和模具的多用途平面化/后研磨/预底部填充布置
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申请号： US10910933申请日： 2004-08-03
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公开(公告)号： US20050006767A1公开(公告)日： 2005-01-13
- 发明人: Takashi Kumamoto
- 申请人： Takashi Kumamoto
- 主分类号： H01L21/56
- IPC分类号： H01L21/56 ; H01L21/68 ; H01L21/44
摘要：
Multi-purpose planarizing/back-grind/pre-under-fill arrangements for bumped wafers and dies, in which a planarizing coating provides improved and continued surface protection to the circuit surface of a wafer or die throughout back-grinding and subsequent mounting operations, and provides improved stiffening/strengthening of the wafer and die throughout back-grinding and subsequent mounting operations.
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