发明申请
- 专利标题： High voltage transistor and method of manufacturing the same
- 专利标题（中）： 高压晶体管及其制造方法
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申请号： US10899371申请日： 2004-07-26
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公开(公告)号： US20050035404A1公开(公告)日： 2005-02-17
- 发明人: Tae-kwang Yu , Hee-seog Jeon , Seung-beom Yoon , Yong-tae Kim
- 申请人： Tae-kwang Yu , Hee-seog Jeon , Seung-beom Yoon , Yong-tae Kim
- 专利权人： Samsung Electronics Co., Ltd.
- 当前专利权人： Samsung Electronics Co., Ltd.
- 优先权： KR03-55363 20030811
- 主分类号： H01L29/41
- IPC分类号： H01L29/41 ; H01L21/265 ; H01L21/28 ; H01L21/336 ; H01L21/8247 ; H01L27/115 ; H01L29/417 ; H01L29/423 ; H01L29/78 ; H01L29/788 ; H01L29/792 ; H01L31/0328
摘要：
The present invention relates to a high voltage transistor and method of manufacturing the same. The high voltage transistor includes: a channel region which is formed in a semiconductor substrate; a gate insulating film which is formed on the channel region of the semiconductor substrate; a low concentration source region and a low concentration drain region having the channel region interposed therebetween and each being formed in the semiconductor substrate; a high concentration source region which is formed to be spaced away from the channel region by a first distance; a high concentration drain region which is formed to be spaced away from the channel region by a second distance that is larger than the first distance; a gate electrode which has a gate bottom portion interfacing with the gate insulating film over the channel region, and a gate top portion integrated with the gate bottom portion and protruding by a predetermined length from a top of the gate bottom portion to extend over the low concentration drain region; a first metal silicide layer which is formed on the high concentration source region; and a second metal silicide layer which is formed on the high concentration drain region.