发明申请
- 专利标题: Integrated Circuit Chip Having A Ringed Wiring Layer Interposed Between A Contact Layer And A Wiring Grid
- 专利标题(中): 具有接触层和布线网格之间的环形接线层的集成电路芯片
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申请号: US10604995申请日: 2003-08-29
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公开(公告)号: US20050050505A1公开(公告)日: 2005-03-03
- 发明人: Thomas Bednar , Timothy Budell , Patrick Buffet , Alain Caron , James Crain , Douglas Kemerer , Donald Kent , Esmaeil Rahmati
- 申请人: Thomas Bednar , Timothy Budell , Patrick Buffet , Alain Caron , James Crain , Douglas Kemerer , Donald Kent , Esmaeil Rahmati
- 申请人地址: US NY Armonk
- 专利权人: INTERNATIONAL BUSINESS MACHINES CORPORATION
- 当前专利权人: INTERNATIONAL BUSINESS MACHINES CORPORATION
- 当前专利权人地址: US NY Armonk
- 主分类号: H01L23/528
- IPC分类号: H01L23/528 ; G06F17/50 ; H01L23/52
摘要:
An integrated circuit chip (104) having a contact layer (136) that includes a plurality of Vdd, Vddx, ground and I/O contacts (116, 120, 124, 128) arranged in a generally radial pattern having diagonal and major axis symmetry and generally defining four quadrants. An X-Y power grid (140) is located beneath the contact layer and includes metal layers (LM′) each having a plurality of wires (68) extending in one direction. The direction of the wires alternates from one metal layer to the next adjacent metal layer. A wiring layer (IM) is interposed between the contact layer and power grid layers to provide a well-behaved electrical transition between the generally radial Vdd, Vddx and ground contacts and the rectangular X-Y power grid. The interposed wiring layer includes concentric square rings of Vdd, Vddx and ground wires (144, 148, 152) located alternatingly with one another. The Vddx wires are discontinuous between adjacent quadrants so that the magnitude of Vddx may be different in each quadrant of the chip if desired.