Semiconductor devices and fabrication methods are presented, in which transistor gate structures are created using doped metal silicide materials. Upper and lower metal silicides are formed above a gate dielectric, wherein the lower metal silicide is doped with n-type impurities for NMOS gates and with p-type impurities for PMOS gates, and wherein a silicon may, but need not be formed between the upper and lower metal silicides. The lower metal silicide can be deposited directly, or may be formed through reaction of deposited metal and poly-silicon, and the lower silicide can be doped by diffusion or implantation, before or after gate patterning.