发明申请
US20050079707A1 Interconnection substrate and fabrication method thereof 失效
互连基板及其制造方法

Interconnection substrate and fabrication method thereof
摘要:
An interconnection substrate include: interconnection layer 12 region where at least first conductor layer 16 and second conductor layer 18 are vertically stacked in that order on substrate 10, first conductor layer 16 and second conductor layer 18 containing conductive particles and a binder, wherein first conductor layer 16 and second conductor layer 18 stacked in the interconnection layer 12 region have conductive particles different in average particle size from each other. As a result, only intended region can have low resistance.
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