发明申请
US20050093102A1 MIXED LVR AND HVR RETICLE SET DESIGN FOR THE PROCESSING OF GATE ARRAYS, EMBEDDED ARRAYS AND RAPID CHIP PRODUCTS
失效
混合LVR和HVR反馈设置用于加工门阵列，嵌入式阵列和快速芯片产品
- 专利标题： MIXED LVR AND HVR RETICLE SET DESIGN FOR THE PROCESSING OF GATE ARRAYS, EMBEDDED ARRAYS AND RAPID CHIP PRODUCTS
- 专利标题（中）： 混合LVR和HVR反馈设置用于加工门阵列，嵌入式阵列和快速芯片产品
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申请号： US10699276申请日： 2003-10-31
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公开(公告)号： US20050093102A1公开(公告)日： 2005-05-05
- 发明人: John Jensen , Robert Muller , Mark Simmons
- 申请人： John Jensen , Robert Muller , Mark Simmons
- 主分类号： G03C8/00
- IPC分类号： G03C8/00 ; G03F7/20 ; G03F9/00 ; H01L21/337 ; H01L21/44 ; H01L21/4763 ; H01L21/48 ; H01L21/50 ; H01L23/544
摘要：
An embodiment of the present invention provides a novel method which makes LVR to HVR registration possible by wrapping the X and Y scribes around each instance of each layer on both the LVR and HVR reticles; standard HVR reticles and LVR reticles will not align to one another due to registration and electrical test structures in the scribe being in different locations. Another embodiment of the present invention addresses the loss of die per wafer due to increased scribe area when using LVR and HVR reticles in the same set.
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