Invention Application
- Patent Title: Method of manufacturing thin film transistor array substrate
- Patent Title (中): 制造薄膜晶体管阵列基板的方法
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Application No.: US10975537Application Date: 2004-10-29
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Publication No.: US20050095759A1Publication Date: 2005-05-05
- Inventor: Yong Cho , Jung Lee
- Applicant: Yong Cho , Jung Lee
- Priority: KR2003-76497 20031030
- Main IPC: H01L29/786
- IPC: H01L29/786 ; H01L21/00 ; H01L21/77 ; H01L21/84 ; H01L27/12

Abstract:
A method of manufacturing a thin film transistor array substrate to prevent damage to a pad is disclosed. The method includes forming gate lines and data lines that cross each other on a lower substrate, a gate insulating film located between the gate and data lines, a thin film transistor formed at every crossing, a lower gate pad electrode connected to the gate, and a lower data pad electrode; forming a passivation film on the substrate provided with the gate insulating film; forming a photo-resist pattern on the substrate provided with the passivation film; forming a first hole passing through a portion of the passivation film and a portion of the gate insulating film; removing the photo-resist pattern; forming a second hole exposing the lower gate pad electrode; and forming a transparent electrode pattern including an upper gate pad electrode connected to the exposed lower gate pad electrode.
Public/Granted literature
- US07563627B2 Method of manufacturing thin film transistor array substrate Public/Granted day:2009-07-21
Information query
IPC分类: