发明申请
- 专利标题: Numerical value conversion using a saturation limited arithmetic logic unit supporting variable resolution operands
- 专利标题(中): 使用饱和限制运算逻辑单元支持可变分辨率操作数的数值转换
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申请号: US10759988申请日: 2004-01-15
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公开(公告)号: US20050131973A1公开(公告)日: 2005-06-16
- 发明人: Peter Chambers , Joseph Judkins
- 申请人: Peter Chambers , Joseph Judkins
- 主分类号: G06F7/00
- IPC分类号: G06F7/00
摘要:
A device for performing numerical value conversion of a digital input value in a first unit to a second, natural unit where the digital input value is a digitized value of a first measurement parameter includes a look-up table storing an array of coefficients for performing the numerical value conversion for multiple measurement parameters. The look-up table is indexed using a first parameter indicative of the first measurement parameter to provide a selected coefficient. The device further includes an arithmetic logic unit (ALU) receiving the digital input value and the selected coefficient and performing the numerical value conversion based on a first equation and the selected coefficient to compute a digital output value. The device also includes a saturation-limit circuit coupled to receive the digital output value from the arithmetic logic unit and provide a predetermined output value when the digital output value exceeds a predetermined maximum value.
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