发明申请
- 专利标题： Framework for hierarchical VLSI design
- 专利标题（中）： 分层VLSI设计框架
-
申请号： US10733210申请日： 2003-12-10
-
公开(公告)号： US20050132320A1公开(公告)日： 2005-06-16
- 发明人: Robert Allen , Ulrich Finkler , Mark Lavin , Robert Sayah
- 申请人： Robert Allen , Ulrich Finkler , Mark Lavin , Robert Sayah
- 主分类号： G06F17/50
- IPC分类号： G06F17/50
摘要：
A method for hierarchical very large scale integration design comprises representing a structure of the hierarchical very large scale integrated design as a graph comprising design objects. The method further comprises specifying a transformation behavior applied to the design objects, and processing, top-down, the graph to perform the transformation on the hierarchical very large scale integrated design.
公开/授权文献
- US07089511B2 Framework for hierarchical VLSI design 公开/授权日：2006-08-08