发明申请
US20050148133A1 Method of making strained channel CMOS transistors having lattice-mismatched epitaxial
有权
制造具有晶格失配外延的应变通道CMOS晶体管的方法
- 专利标题： Method of making strained channel CMOS transistors having lattice-mismatched epitaxial
- 专利标题（中）： 制造具有晶格失配外延的应变通道CMOS晶体管的方法
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申请号： US11052675申请日： 2005-02-07
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公开(公告)号： US20050148133A1公开(公告)日： 2005-07-07
- 发明人: Huaje Chen , Dureseti Chidambarrao , Omer Dokumaci , Haining Yang
- 申请人： Huaje Chen , Dureseti Chidambarrao , Omer Dokumaci , Haining Yang
- 主分类号： H01L21/265
- IPC分类号： H01L21/265 ; H01L21/336 ; H01L21/8238 ; H01L29/78 ; H01L29/00
摘要：
A method is provided in which an n-type field effect transistor (NFET) and a p-type field effect transistor (PFET) each have a channel region disposed in a first single-crystal semiconductor region having a first composition. A stress is applied at a first magnitude to a channel region of the PFET but not at that magnitude to the channel region of the NFET. The stress is applied by a single-crystal semiconductor layer having a second composition such that the single-crystal semiconductor layer is lattice-mismatched to the first region. The semiconductor layer is formed over the source and drain regions and optionally over the extension regions of the PFET at a first distance from the channel region of the PFET and is formed over the source and drain regions of the NFET at a second, greater distance from the channel region of the NFET, or the semiconductor layer having the second composition is not formed at all in the NFET.
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