发明申请
US20050148358A1 Wireless multiprocessor system-on-chip with unified memory and fault inhibitor
有权
具有统一存储器和故障抑制器的无线多处理器片上系统
- 专利标题: Wireless multiprocessor system-on-chip with unified memory and fault inhibitor
- 专利标题(中): 具有统一存储器和故障抑制器的无线多处理器片上系统
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申请号: US10841739申请日: 2004-05-06
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公开(公告)号: US20050148358A1公开(公告)日: 2005-07-07
- 发明人: Jian Lin , Nicholas Yu
- 申请人: Jian Lin , Nicholas Yu
- 主分类号: H04B7/185
- IPC分类号: H04B7/185 ; H04M1/725
摘要:
Wireless mobile communication device includes unified memory portion; processing units coupled with, and communicating through, unified memory; fault inhibitor coupled with unified memory inhibiting operational fault from nocent informon. Memory, fault inhibitor, and processing units fabricated on monolithic integrated circuit as system-on-chip disposed in wireless mobile personal host. Multiprocessor module includes fault inhibitor and applications and communications processing units and buses, coupled with unified memory. Integrated functional constituent can include coprocessor, accelerator, operational control unit, interprocessor controller, memory controller, bus management unit, bridge, arbiters, and transceiver. Method inhibits operational fault from nocent informon, setting device in operational or fallback state.