发明申请
US20050152209A1 Synchronous semiconductor memory devices and data strobe input buffers with an input buffer circuit and a detection circuit for buffering data thereto 有权
同步半导体存储器件和具有输入缓冲器电路的数据选通输入缓冲器和用于缓冲数据的检测电路

  • 专利标题: Synchronous semiconductor memory devices and data strobe input buffers with an input buffer circuit and a detection circuit for buffering data thereto
  • 专利标题(中): 同步半导体存储器件和具有输入缓冲器电路的数据选通输入缓冲器和用于缓冲数据的检测电路
  • 申请号: US11011549
    申请日: 2004-12-14
  • 公开(公告)号: US20050152209A1
    公开(公告)日: 2005-07-14
  • 发明人: Won-hwa ShinSeong-jin JangSang-joon Hwang
  • 申请人: Won-hwa ShinSeong-jin JangSang-joon Hwang
  • 优先权: KR10-2004-0001104 20040108
  • 主分类号: G11C7/10
  • IPC分类号: G11C7/10 G11C8/00 G11C11/4093
Synchronous semiconductor memory devices and data strobe input buffers with an input buffer circuit and a detection circuit for buffering data thereto
摘要:
A synchronous semiconductor memory device includes a data input buffer and a data strobe input buffer. The data strobe input buffer includes an input buffer circuit and a detection circuit. The input buffer circuit is configured to be enabled based on an active signal, and to compare a data strobe signal with a first reference voltage to generate an internal data strobe signal. The detection circuit is configured to be enabled based on the active signal, and to compare the data strobe signal with a second reference voltage to generate a detection signal for enabling the data input buffer.
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