发明申请
- 专利标题: Concurrent refresh mode with distributed row address counters in an embedded DRAM
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申请号: US10757846申请日: 2004-01-15
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公开(公告)号: US20050157577A1公开(公告)日: 2005-07-21
- 发明人: John Barth , Toshiaki Kirihata , Paul Parries
- 申请人: John Barth , Toshiaki Kirihata , Paul Parries
- 主分类号: G11C11/406
- IPC分类号: G11C11/406 ; G11C7/00
摘要:
A concurrent refresh mode is realized by allowing a memory array to be refreshed by way of a refresh bank select signal, while concurrently enabling a memory access operation in another array. The refresh address management is greatly simplified by the insertion of row address counter integrated within each array. In the preferred embodiment, any combination of a plurality of the memory arrays is refreshed simultaneously while enabling a memory access operation. This concurrent mode also supports a multi-bank operation.
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