An input signal INDATA inputted to a sender-side interface portion is encoded by an encoder, and a transmission signal generated by the encoding is transmitted to a receiver-side interface portion through two signal transmission lines. The input signal INDATA is encoded in such a manner that the logic level of the transmission signal transmitted through at least one of the two signal transmission lines is changed in any two consecutive elementary periods. The receiver-side interface portion is provided with a clock receiver, and a clock signal is generated based on the change of the transmission signals supplied from the two signal transmission lines.