发明申请
- 专利标题: Arithmetic device
- 专利标题(中): 算术设备
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申请号: US10888991申请日: 2004-07-13
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公开(公告)号: US20050165875A1公开(公告)日: 2005-07-28
- 发明人: Kenji Mukaida , Masahiko Takenaka , Naoya Torii , Shoichi Masui
- 申请人: Kenji Mukaida , Masahiko Takenaka , Naoya Torii , Shoichi Masui
- 专利权人: FUJITSU LIMITED
- 当前专利权人: FUJITSU LIMITED
- 优先权: JP2004-017206 20040126
- 主分类号: G06F7/72
- IPC分类号: G06F7/72 ; G09C1/00 ; G06F7/00
摘要:
An arithmetic device for Montgomery modular multiplication which quickly calculates a parameter ND with a large number of effective lower bits. The device comprises an ND generator, a multiplication-accumulation (MAC) operator, and a sum data store. The ND generator produces effective lower bits of ND at a rate of k bits per clock cycle, with reference to lower k bits of a variable S, as well as to lower k bits of an odd positive integer N. The MAC operator multiplies the produced k-bit ND value by N and adds the resulting product to S. The sum data store stores the variable S, which is updated with the output of the MAC operator, with its bits shifted right by k bits, for use by the ND generator in the subsequent clock cycle.