Invention Application
US20050202221A1 SEMICONDUCTOR CHIP CAPABLE OF IMPLEMENTING WIRE BONDING OVER ACTIVE CIRCUITS 有权
在有源电路上实现线路连接的半导体芯片

  • Patent Title: SEMICONDUCTOR CHIP CAPABLE OF IMPLEMENTING WIRE BONDING OVER ACTIVE CIRCUITS
  • Patent Title (中): 在有源电路上实现线路连接的半导体芯片
  • Application No.: US10907959
    Application Date: 2005-04-22
  • Publication No.: US20050202221A1
    Publication Date: 2005-09-15
  • Inventor: Kun-Chih WangBing-Chang Wu
  • Applicant: Kun-Chih WangBing-Chang Wu
  • Main IPC: H01L23/485
  • IPC: H01L23/485 B32B3/00
SEMICONDUCTOR CHIP CAPABLE OF IMPLEMENTING WIRE BONDING OVER ACTIVE CIRCUITS
Abstract:
A reinforced bonding pad structure includes a bondable metal layer defined on a stress-buffering dielectric layer, and an intermediate metal layer damascened in a first inter-metal dielectric (IMD) layer disposed under the stress-buffering dielectric layer. The intermediate metal layer is situated directly under the bondable metal layer and is electrically connected to the bondable metal layer with a plurality of via plugs integrated with the bondable metal layer. A metal frame is damascened in a second IMD layer under the first IMD layer. The metal frame is situated directly under the intermediate metal layer for counteracting mechanical stress exerted on the bondable metal layer during bonding, when the thickness of said stress-buffering dielectric layer is greater than 2000 angstroms, the damascened metal frame may be omitted. An active circuit portion including active circuit components of the integrated circuit is situated directly under the metal frame.
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