A memory package comprising a first cover portion connected to a second cover portion. The first cover portion supports a first electronics sub-assembly that comprise a circuit board with at least one memory module socket and at least one controller chip mounted thereto. The second cover portion supports a second electronics sub-assembly that comprises a circuit board with at least one memory module socket and at least one controller chip mounted thereto. The first and second cover portions are moveable between a closed position wherein the electronics sub-assemblies are nested and an open position wherein the electronics sub-assemblies are not nested.