发明申请
- 专利标题: Multi-gate MOS transistor and method of manufacturing the same
- 专利标题(中): 多栅极MOS晶体管及其制造方法
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申请号: US11012695申请日: 2004-12-16
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公开(公告)号: US20050224880A1公开(公告)日: 2005-10-13
- 发明人: Dae Lee , Tae Roh , Sung Kwon , Il Park , Yil Yang , Byoung Yu , Jong Kim
- 申请人: Dae Lee , Tae Roh , Sung Kwon , Il Park , Yil Yang , Byoung Yu , Jong Kim
- 优先权: KR2003-97072 20031226; KR2004-69589 20040901
- 主分类号: H01L21/336
- IPC分类号: H01L21/336 ; H01L29/423 ; H01L29/78 ; H01L29/786
摘要:
Provided are a multi-gate MOS transistor and a method of manufacturing the same. Two silicon fins are vertically stacked on a silicon on insulator (SOI) substrate, and four side surfaces of an upper silicon fin and three side surfaces of a lower silicon fin are used as a channel. Therefore, a channel width is increased, so that current driving capability of a device is improved, and high performance nano-level semiconductor IC and highly integrated memory IC can be manufactured through the optimization and stability of a process.
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