发明申请
- 专利标题： Three-dimensional multichip stack electronic package structure
- 专利标题（中）： 三维多芯片堆叠电子封装结构
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申请号： US10957653申请日： 2004-10-05
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公开(公告)号： US20050224947A1公开(公告)日： 2005-10-13
- 发明人: Yung-Yu Hsu , Kuo-Ning Chiang , Chang-An Yuan , Chang-Chun Lee , Hsien-Chie Cheng
- 申请人： Yung-Yu Hsu , Kuo-Ning Chiang , Chang-An Yuan , Chang-Chun Lee , Hsien-Chie Cheng
- 申请人地址： TW Hsinchu
- 专利权人： Industrial Technology Research Institute
- 当前专利权人： Industrial Technology Research Institute
- 当前专利权人地址： TW Hsinchu
- 优先权： TW093109070 20040401
- 主分类号： H01L21/50
- IPC分类号： H01L21/50 ; H01L23/28 ; H01L23/48 ; H01L25/065 ; H01L25/10
摘要：
The present invention relates to a three-dimensional multichip stack electronic package structure and method for making the same, including a main substrate having at least a pin-hole set and at least a flexible substrate having at least a pin terminal. At least an electronic device including an active component and a passive component is attached to the flexible substrate by adhesion. In the flexible substrate, electric signals of the electronic device are delivered to the pin terminal through at least a conductive wire for transmitting electric signals. In assembly, the pin terminal of the flexible substrate is inserted into the pin hole of the main substrate. Then, the flexible substrate is folded so as to package the electronic device in a three-dimensional multichip stack manner.