An electrical connection terminal of an embedded chip and a method for fabricating the same are proposed. Firstly, an insulating layer is provided on a circuit board integrated with a chip and is produced a plurality of first openings on the circuit board, wherein at least one of the first openings corresponds to a position of a conductive pad of the chip to expose the conductive pad. Then, a first metal layer is formed on the conductive pad and a conductive layer is formed on the surface of the first metal layer, insulating layer and the first openings. A patterned resist layer having a plurality of second openings is formed on the conductive layer to expose a part of the conductive layer to be subsequently deposited with a second metal layer, wherein at least one of the second openings of the resist layer is located correspondingly to the conductive pad. Subsequently, the second metal layer is formed on the exposed part of the conductive layer by an electroplating process. By such arrangement, the fabrication of the conductive structure of the conductive pad of the chip and build-up of conductive circuits on the circuit board can be simultaneously integrated to simplify processes and costs of the fabrication.