- 专利标题: High speed source synchronous signaling for interfacing VLSI CMOS circuits to transmission lines
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申请号: US11176799申请日: 2005-07-06
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公开(公告)号: US20050242847A1公开(公告)日: 2005-11-03
- 发明人: Ejaz Haq
- 申请人: Ejaz Haq
- 申请人地址: US CA Sunnyvale
- 专利权人: JAZIO, INC.
- 当前专利权人: JAZIO, INC.
- 当前专利权人地址: US CA Sunnyvale
- 主分类号: H04L25/06
- IPC分类号: H04L25/06 ; G01R29/02 ; G06F13/40 ; H03K19/0185 ; H03M9/00 ; H04L7/00 ; H04L25/02
摘要:
A system of the present invention uses small swing differential source synchronous voltage and timing reference (SSVTR and /SSVTR) signals to compare single-ended signals of the same slew rate generated at the same time from the same integrated circuit for high frequency signaling. The SSVTR and /SSVTR signals toggle every time the valid signals are driven by the transmitting integrated circuit. Each signal receiver includes two comparators, one for comparing the signal against SSVTR and the other for comparing the signal against /SSVTR. A present signal binary value determines which comparator is coupled to the receiver output, optionally by using exclusive-OR logic with SSVTR and /SSVTR. The coupled comparator in the receiver detects whether change in signal binary value occurred or not until SSVTR and /SSVTR have changed their binary value. The same comparator is coupled if the signal transitions. The comparator is de-coupled if no transition occurs.