发明申请
- 专利标题: Latency control circuit and method of latency control
- 专利标题(中): 延迟控制电路和延时控制方法
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申请号: US11188708申请日: 2005-07-26
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公开(公告)号: US20050254337A1公开(公告)日: 2005-11-17
- 发明人: Sang-bo Lee , Ho-young Song
- 申请人: Sang-bo Lee , Ho-young Song
- 优先权: KRKR2002-40094 20020710; KRKR2003-36747 20030609
- 主分类号: G11C11/407
- IPC分类号: G11C11/407 ; G11C7/10 ; G11C7/22 ; G11C8/00
摘要:
The memory device includes a memory cell array, and an output buffer receiving data addressed from the memory cell array and outputting the data based on a latency signal. A latency circuit selectively associates at least one transfer signal with at least one sampling signal based on CAS latency information to create a desired timing relationship between the associated sampling and transfer signals. The latency circuit stores read information in accordance with at least one of the sampling signals, and generates a latency signal based on the transfer signal associated with the sampling signal used in storing the read information.
公开/授权文献
- US07065003B2 Latency control circuit and method of latency control 公开/授权日:2006-06-20