A fuse-data reading circuit is provided in a semiconductor integrated circuit device. In the fused-data reading circuit, a differential latch circuit compares a current depending on the resistance across a first fuse element, i.e., target element, with a current depending on the resistance of a series circuit including a second fuse element used as a reference fuse element and a resistor element. The differential latch circuit determines whether the first fuse element has been cut or not.