A plasma display panel enhanced light emission efficiency is disclosed. In one embodiment, the PDP includes a rear substrate, a front substrate disposed apart from the rear substrate, a plurality of barrier ribs that define discharge cells together with the rear substrate and the front substrate and disposed between the rear substrate and the front substrate, a plurality of sustain electrode pairs extended across the discharge cells, and a plurality of address electrodes extended across the discharge cells to cross the sustain electrode pairs. The PDP also includes a first dielectric layer that covers the address electrodes, a second dielectric layer that covers the sustaining electrode pairs, a fluorescent layer disposed in each discharge cell and a discharge gas filled in the discharge cells, wherein the barrier ribs comprise vertical units formed in a direction in which the address electrodes are extended, and horizontal units that cross the vertical units. Each of the sustain electrodes comprises a bus electrode extending across the discharge cells and a discharge electrode, wherein the discharge electrode includes i) a main body unit disposed apart from the bus electrode toward the center of each discharge cell and ii) connection units that connect he main body unit and the bus electrode, and the relative width ratio of the connection units to the vertical units is in a range of about 3/7 to about 6/7.