发明申请
- 专利标题: Semiconductor device
- 专利标题(中): 半导体器件
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申请号: US11025138申请日: 2004-12-30
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公开(公告)号: US20060002212A1公开(公告)日: 2006-01-05
- 发明人: Shuji Nakaya , Mitsuaki Hayashi , Masakazu Kurata
- 申请人: Shuji Nakaya , Mitsuaki Hayashi , Masakazu Kurata
- 申请人地址: JP Osaka
- 专利权人: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
- 当前专利权人: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
- 当前专利权人地址: JP Osaka
- 优先权: JP2004-002185 20040701
- 主分类号: G11C7/00
- IPC分类号: G11C7/00
摘要:
An output end and an inverted output end of a latch circuit that is connected to an output buffer circuit are switched with each other, and thereby, the relationship between the data of “0” or “1” and the drain of a memory cell is connected or not connected to a bit line is changed. In addition, an input of a sense amplifier is fixed at the grounding potential by means of a test control signal, and thereby, positive logic is confirmed in the case where the output of the output buffer circuit is “L,” and negative logic is confirmed in the case where the output of the output buffer circuit is “H.”