Invention Application
- Patent Title: Processor and pipeline reconfiguration control method
- Patent Title (中): 处理器和管道重新配置控制方法
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Application No.: US11063860Application Date: 2005-02-23
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Publication No.: US20060004993A1Publication Date: 2006-01-05
- Inventor: Shiro Uriu , Mitsuharu Wakayoshi , Tetsuo Kawano , Hiroshi Furukawa , Ichiro Kasama , Kazuaki Imafuku , Toshiaki Suzuki
- Applicant: Shiro Uriu , Mitsuharu Wakayoshi , Tetsuo Kawano , Hiroshi Furukawa , Ichiro Kasama , Kazuaki Imafuku , Toshiaki Suzuki
- Applicant Address: JP Kawasaki
- Assignee: FUJITSU LIMITED
- Current Assignee: FUJITSU LIMITED
- Current Assignee Address: JP Kawasaki
- Priority: JP2004-193580 20040630
- Main IPC: G06F9/00
- IPC: G06F9/00

Abstract:
A reconfigurable processor calculates execution times of configuration for executing pipeline processing from hardware configuration information, and fixes a clock cycle until processing ends. A counter compares the fixed clock cycle with the actual number of elapsed clocks, and, when the number of elapsed clocks equals the clock cycle, it is determined that pipeline processing has ended, and a configuration controller is notified of this.
Public/Granted literature
- US07194610B2 Processor and pipeline reconfiguration control method Public/Granted day:2007-03-20
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