- 专利标题: Method for producing bit lines for UCP flash memories
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申请号: US11194059申请日: 2005-07-29
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公开(公告)号: US20060024889A1公开(公告)日: 2006-02-02
- 发明人: Achim Gratz , Mayk Roehrich , Veronika Polei
- 申请人: Achim Gratz , Mayk Roehrich , Veronika Polei
- 优先权: DE10303847.7 20030130
- 主分类号: H01L21/336
- IPC分类号: H01L21/336
摘要:
A semiconductor device can be fabricated by forming a floating gate layer over a semiconductor body. The floating gate layer is at least partially arranged over an insulation region in the semiconductor body. The floating gate layer is patterned to expose a portion of the insulation region. A recess is formed in a portion of the insulation region exposed by the patterned floating gate layer. A conductor is deposited within the recess. The conductor serves as a buried bitline. An insulator can then be formed within the recess over the conductor.
公开/授权文献
- US07485542B2 Method for producing bit lines for UCP flash memories 公开/授权日:2009-02-03
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