- 专利标题: Computer system for load balance, program and method for setting paths
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申请号: US10975447申请日: 2004-10-29
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公开(公告)号: US20060026346A1公开(公告)日: 2006-02-02
- 发明人: Satoshi Kadoiri , Hiroshi Morishima , Makoto Aoki , Isao Nagase
- 申请人: Satoshi Kadoiri , Hiroshi Morishima , Makoto Aoki , Isao Nagase
- 优先权: JP2004-220241 20040728
- 主分类号: G06F12/00
- IPC分类号: G06F12/00
摘要:
Provided is a high performance storage system, in which a cache memory is effectively used and access loads are balanced. In a computer system including a computer and a storage system coupled with the computer, the storage system includes one or more channel adapters which communicate with the computer, and a plurality of logical units which store data. The computer includes one or more host bus adapters which communicate with the storage system, and a path management module which manages a path along which the computer accesses the logical unit. The path management module includes a load measurement module which measures an access load on each logical unit, and an active path setting module which sets one or more active paths, along which an access from the computer passes, for each of the logical unit based on the measured access load.
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