发明申请
- 专利标题： Wafer level package, multi-package stack, and method of manufacturing the same
- 专利标题（中）： 晶圆级封装，多封装堆叠及其制造方法
-
申请号： US11253755申请日： 2005-10-20
-
公开(公告)号： US20060033212A1公开(公告)日： 2006-02-16
- 发明人: Hyeong-Seob Kim , Tae-Gyeong Chung
- 申请人： Hyeong-Seob Kim , Tae-Gyeong Chung
- 优先权： KR2003-18446 20030325
- 主分类号： H01L23/48
- IPC分类号： H01L23/48
摘要：
A semiconductor chip package includes a semiconductor chip having a through hole extending there through from an active first surface to an inactive second surface. A first conductive pad at least partially surrounds the through hole on the active first surface of the semiconductor chip. The package also includes a printed circuit board having a first surface attached to the inactive second surface of the semiconductor chip, and a second conductive pad aligned with the through hole of the semiconductor chip. A conductive material fills the through hole and contacts the first and second conductive pads.
公开/授权文献
信息查询
IPC分类:
