发明申请
US20060049871A1 Multi-stage output buffer 有权
多级输出缓冲器

  • 专利标题: Multi-stage output buffer
  • 专利标题(中): 多级输出缓冲器
  • 申请号: US10934164
    申请日: 2004-09-03
  • 公开(公告)号: US20060049871A1
    公开(公告)日: 2006-03-09
  • 发明人: Hans-Martin ReinHao Li
  • 申请人: Hans-Martin ReinHao Li
  • 主分类号: H03F3/45
  • IPC分类号: H03F3/45
Multi-stage output buffer
摘要:
A multi-stage output buffer is disclosed having a differential input and a differential output. The output buffer includes an emitter follower circuit coupled to the differential input that is configured to provide a substantially high input impedance at an input thereof, and provide a substantially low output impedance at an output thereof. An emitter coupled pair circuit is coupled to the output of the emitter follower circuit, and is configured to amplify the signal and further isolate an input circuit when coupled to the differential input of the multi-stage output buffer from an external load when coupled to the differential output thereof. The buffer further includes a base-grounded transistor circuit coupled to an output of the emitter coupled pair circuit and having an output coupled to the differential output of the multi-stage output buffer. The base-grounded transistor circuit is configured to reduce a load impedance at the output of the emitter coupled pair circuit, thereby improving a speed thereof. The base-grounded transistor circuit further improves decoupling of the external load from an input circuit when coupled thereto and increases the output power.
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