发明申请
US20060055065A1 HV-MOS and mixed-signal circuit structure with low-k interconnection
审中-公开
HV-MOS和低k互连的混合信号电路结构
- 专利标题： HV-MOS and mixed-signal circuit structure with low-k interconnection
- 专利标题（中）： HV-MOS和低k互连的混合信号电路结构
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申请号： US10938480申请日： 2004-09-10
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公开(公告)号： US20060055065A1公开(公告)日： 2006-03-16
- 发明人: Chi-Wen Liu , Kuo-Ching Chiang , Horng-Huei Tseng , Syun-Ming Jang
- 申请人： Chi-Wen Liu , Kuo-Ching Chiang , Horng-Huei Tseng , Syun-Ming Jang
- 申请人地址： TW Hsin-Chu
- 专利权人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人地址： TW Hsin-Chu
- 主分类号： H01L31/109
- IPC分类号： H01L31/109
摘要：
A semiconductor chip comprises a fast device formed on a semiconductor substrate and a high-voltage metal-oxide-semiconductor transistor (HV-MOS) formed on the semiconductor substrate and an interconnect isolation feature having a low-k dielectric material disposed over the fast device and the HV-MOS in the semiconductor substrate.
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