The present invention relates to a memory on a silicon microchip, comprising a serial input/output and an integrated memory array addressable under N bits. According to the present invention, the memory comprises means for storing a most significant address allocated to the memory within an extended memory array addressable with an extended address of N+K bits, an extended address counter for storing an extended address received at the serial input/output of the memory, the extended address comprising N least significant bits that are applied to the integrated memory array, and K most significant bits, means for comparing the K most significant bits with the most significant address allocated to the memory, and means for preventing the execution of a command for reading or writing the integrated memory array if the K most significant address bits are different to the most significant address allocated to the memory. In one embodiment, a ready/busy pad is provided that is taken to a selected potential to prevent access to the memory.