发明申请
- 专利标题: Semiconductor device and manufacturing method thereof
- 专利标题(中): 半导体装置及其制造方法
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申请号: US11242909申请日: 2005-10-05
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公开(公告)号: US20060071282A1公开(公告)日: 2006-04-06
- 发明人: Masaru Kadoshima , Toshihide Nabatame , Akira Toriumi
- 申请人: Masaru Kadoshima , Toshihide Nabatame , Akira Toriumi
- 优先权: JP2004-292420 20041005
- 主分类号: H01L29/94
- IPC分类号: H01L29/94
摘要:
A structure of a MIS transistor for realizing a CMOS circuit capable of simultaneously achieving the high ON current and the low power consumption is provided. Each of the gate insulators of a n channel MIS transistor and a p channel MIS transistor is composed of a hafnium oxide film. Also, the gate electrode is composed of a Pt silicide film with a ratio of Si atoms to Pt atoms of approximately 1 (PtSix: x=1) in the vicinity of a region in contact with the gate insulator. Also, the gate electrode of the p channel MIS transistor is composed of a Pt silicide film with a ratio of Si atoms to Pt atoms of less than 1 (PtSix: x
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